JEDEC JESD51-14 PDF

INTERFACE TEST METHOD FOR THE MEASUREMENT OF THE THERMAL RESISTANCE JUNCTION-TO-CASE OF SEMICONDUCTOR DEVICES WITH HEAT FLOW TROUGH A SINGLE PATH

JEDEC JESD51-14 – INTERFACE TEST METHOD FOR THE MEASUREMENT OF THE THERMAL RESISTANCE JUNCTION-TO-CASE OF SEMICONDUCTOR DEVICES WITH HEAT FLOW TROUGH A SINGLE PATH

This document specifies a test method (referred to herein as “Transient Dual Interface Measurement”) to determine the conductive thermal resistance “Junction-to-Case” R0JC (0JC) of semiconductor devices with a heat flow through a single path, i.e., semiconductor devices with a high conductive heat flow path from the die surface that is heated to a package case surface that can be cooled by contacting it to an external heat sink.