IPC J-STD-028 PDF

Performance Standard fo Construction of Flip Chip and Chip Scale Bumps

IPC J-STD-028 – Performance Standard fo Construction of Flip Chip and Chip Scale Bumps

This new standard establishes construction detail requirements for bumps and other terminal structures used for Flip Chip and Chip Scale carriers. The specific standards for different terminations are appropriately matched to a particular interconnection process and include such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The document articulates a set of designations and expectations for product performance for the manufacture and the user of flip chip or chip scale devices. Recommendations are provided for options and flexibility to implement best commercial practices and evolving process improvements.