IEC 60822 Ed. 1.0 b PDF
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VSB – Parallel Sub-system Bus of the IEC 60821 VMEbus
Published by | Publication Date | Number of Pages |
IEC | 12/30/1988 | 311 |
IEC 60822 Ed. 1.0 b – VSB – Parallel Sub-system Bus of the IEC 60821 VMEbus
The VSB bus was designed to meet the needs of multiprocessor systems based on high-performance 32-bit microprocessors built up from board assemblies. lt includes a high-speed asynchronous data transfer bus allowing masters to direct the transfer of binary data to and from slaves according to 4 kinds of cycles: address-only, single-transfer, block-transfer and interrupt-acknowledge cycles. It also includes an arbitration bus enabling arbiter modules and/or requester modules to coordinate the use of the data-transfer bus according to two arbitration methods (series or parallel).Note: -For the price of this publication, please consult the ISO/IEC price-code list.
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