Your shopping cart is empty!
JEDEC JESD75-5 PDF
Product Code:
Availability:
Availability:
product
In Stock
In Stock
$29.15
$53.00
IN TAX $29.15
IN TAX $29.15
SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
| Published by | Publication Date | Number of Pages |
| JEDEC | 07/01/2004 | 11 |
JEDEC JESD75-5 – SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
This standard defines device pinout for 1-, 2- and 3-bit wide logic functions. This pinout specifically applies to the conversion of Dual-Inline-Packaged (DIP) 1-, 2- and 3-bit logic devices to SON/QFN packaged 1-, 2- and 3-bit logic devices. The purpose of this document is to provide a pinout standard for 1-, 2- and 3-bit logic devices offered in 5-, 6- or 8-land SON/QFN packages for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
Reviews (0)