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JEDEC JESD61A.01 PDF
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ISOTHERMAL ELECTROMIGRATION TEST PROCEDURE
| Published by | Publication Date | Number of Pages |
| JEDEC | 10/01/2007 | 49 |
JEDEC JESD61A.01 – ISOTHERMAL ELECTROMIGRATION TEST PROCEDURE
This standard describes an algorithm for the execution of the isothermal test, using computer-controlled instrumentation. The primary use of this test is for the monitoring of microelectronic metallization lines at wafer level (1) in process development, to evaluate process options, (2) in manufacturing, to monitor metallization reliability and (3) to monitor/evaluate process equipment. While it is developed as a fast WLR test, it can also be an effective tool for complementing the reliability data obtained through the standard package level electromigration test.
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