Your shopping cart is empty!
IEEE 1149.10 PDF
Product Code:
Availability:
Availability:
product
In Stock
In Stock
$54.45
$99.00
IN TAX $54.45
IN TAX $54.45
IEEE Standard for High-Speed Test Access Port and On-Chip Distribution Architecture
| Published by | Publication Date | Number of Pages |
| IEEE | 07/28/2017 | 96 |
Preview
IEEE 1149.10 – IEEE Standard for High-Speed Test Access Port and On-Chip Distribution Architecture
New IEEE Standard – Active.Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and support of assembled printed circuit boards, assembled multi-die packages, and the test of die internal circuits is defined in this standard. The circuitry includes a high-speed TAP (HSTAP) with a packet encoder/decoder and distribution architecture through which instructions and test data are communicated. The standard leverages the languages of IEEE Std 1149.1¿¿¿ to describe and operate the on-chip circuits.
Worldwide Standards PDF © 2024
Reviews (0)