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AS 3708.3 PDF
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Mechanical standardization of semiconductor devices – General rules for the preparation of outline drawings of integrated circuits
| Published by | Publication Date | Number of Pages | |
| AS | 12/31/1988 | 35 |
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AS 3708.3 – Mechanical standardization of semiconductor devices – General rules for the preparation of outline drawings of integrated circuits
Specifies rules for the preparation of outline drawings of integrated circuits, indicating how case leads are to be numbered. Information is given on limits for dimensions, illustrations of letter symbols, terminal identification and index area, the design identification of circuit packages of the form G family and rules for such packages intended for automated handling. It is identical with and reproduced from IEC 191-3:1974 as supplemented by IEC 191-3A, 3B, 3C and 3D.
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